MHVLib
20111011
An efficiency oriented runtime library for AVR microcontrollers
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00001 /* 00002 * Copyright (c) 2011, Make, Hack, Void Inc 00003 * All rights reserved. 00004 * 00005 * Redistribution and use in source and binary forms, with or without 00006 * modification, are permitted provided that the following conditions are met: 00007 * * Redistributions of source code must retain the above copyright 00008 * notice, this list of conditions and the following disclaimer. 00009 * * Redistributions in binary form must reproduce the above copyright 00010 * notice, this list of conditions and the following disclaimer in the 00011 * documentation and/or other materials provided with the distribution. 00012 * * Neither the name of the Make, Hack, Void nor the 00013 * names of its contributors may be used to endorse or promote products 00014 * derived from this software without specific prior written permission. 00015 * 00016 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 00017 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 00018 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00019 * DISCLAIMED. IN NO EVENT SHALL MAKE, HACK, VOID BE LIABLE FOR ANY 00020 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 00021 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00022 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 00023 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00024 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 00025 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00026 */ 00027 00028 00029 #ifndef MHV_IO_ATMEGA1280_H_ 00030 #define MHV_IO_ATMEGA1280_H_ 00031 00032 #include <avr/io.h> 00033 00034 // 8 bit timers 00035 // type, ctrlRegA,ctrlRegB,overflow1,overflow2,counter,interrupt,intEnable 00036 #define MHV_TIMER8_0 MHV_TIMER_TYPE_5_PRESCALERS, &TCCR0A, &TCCR0B, &OCR0A, &OCR0B, &TCNT0, &TIMSK0, OCIE0A 00037 #define MHV_TIMER8_2 MHV_TIMER_TYPE_7_PRESCALERS, &TCCR2A, &TCCR2B, &OCR2A, &OCR2B, &TCNT2, &TIMSK2, OCIE2A 00038 00039 #define MHV_TIMER0_INTERRUPTS TIMER0_COMPA_vect, TIMER0_COMPB_vect, 0 00040 #define MHV_TIMER2_INTERRUPTS TIMER2_COMPA_vect, TIMER2_COMPB_vect, 0 00041 00042 // 16 bit timers 00043 // ctrlRegA,ctrlRegB,ctrlRegC,overflow1,overflow2,overflow3,counter,interrupt,inputCapture1 00044 #define MHV_TIMER16_1 &TCCR1A, &TCCR1B, &TCCR1C, &OCR1A, &OCR1B, &OCR1C, &TCNT1, &TIMSK1, &ICR1 00045 #define MHV_TIMER16_3 &TCCR3A, &TCCR3B, &TCCR3C, &OCR3A, &OCR3B, &OCR3C, &TCNT3, &TIMSK3, &ICR3 00046 #define MHV_TIMER16_4 &TCCR4A, &TCCR4B, &TCCR4C, &OCR4A, &OCR4B, &OCR4C, &TCNT4, &TIMSK4, &ICR4 00047 #define MHV_TIMER16_5 &TCCR5A, &TCCR5B, &TCCR5C, &OCR5A, &OCR5B, &OCR5C, &TCNT5, &TIMSK5, &ICR5 00048 00049 #define MHV_TIMER1_INTERRUPTS TIMER1_COMPA_vect, TIMER1_COMPB_vect, TIMER1_COMPC_vect 00050 #define MHV_TIMER3_INTERRUPTS TIMER3_COMPA_vect, TIMER3_COMPB_vect, TIMER3_COMPC_vect 00051 #define MHV_TIMER4_INTERRUPTS TIMER4_COMPA_vect, TIMER4_COMPB_vect, TIMER4_COMPC_vect 00052 #define MHV_TIMER5_INTERRUPTS TIMER5_COMPA_vect, TIMER5_COMPB_vect, TIMER5_COMPC_vect 00053 00054 #define MHV_USART0 &UBRR0, &UCSR0A, &UCSR0B, &UDR0, RXEN0, TXEN0, RXCIE0, TXCIE0, UDRE0, U2X0 00055 #define MHV_USART1 &UBRR1, &UCSR1A, &UCSR1B, &UDR1, RXEN1, TXEN1, RXCIE1, TXCIE1, UDRE1, U2X1 00056 #define MHV_USART2 &UBRR2, &UCSR2A, &UCSR2B, &UDR2, RXEN2, TXEN2, RXCIE2, TXCIE2, UDRE2, U2X2 00057 #define MHV_USART3 &UBRR3, &UCSR3A, &UCSR3B, &UDR3, RXEN3, TXEN3, RXCIE3, TXCIE3, UDRE3, U2X3 00058 00059 #define MHV_USART0_INTERRUPTS USART0_RX_vect, USART0_TX_vect 00060 #define MHV_USART1_INTERRUPTS USART1_RX_vect, USART1_TX_vect 00061 #define MHV_USART2_INTERRUPTS USART2_RX_vect, USART2_TX_vect 00062 #define MHV_USART3_INTERRUPTS USART3_RX_vect, USART3_TX_vect 00063 00064 #define MHV_AD_RESOLUTION 1024 00065 00066 00067 #define MHV_AD_REFERENCE_AREF (uint8_t)(0x00 << 6) 00068 #define MHV_AD_REFERENCE_AVCC (uint8_t)(0x01 << 6) 00069 #define MHV_AD_REFERENCE_1V1 (uint8_t)(0x02 << 6) 00070 #define MHV_AD_REFERENCE_2V56 (uint8_t)(0x03 << 6) 00071 00072 #define MHV_AD_CHANNEL_0 0x00 00073 #define MHV_AD_CHANNEL_1 0x01 00074 #define MHV_AD_CHANNEL_2 0x02 00075 #define MHV_AD_CHANNEL_3 0x03 00076 #define MHV_AD_CHANNEL_4 0x04 00077 #define MHV_AD_CHANNEL_5 0x05 00078 #define MHV_AD_CHANNEL_6 0x06 00079 #define MHV_AD_CHANNEL_7 0x07 00080 #define MHV_AD_CHANNEL_0_X10_0 0x08 00081 #define MHV_AD_CHANNEL_1_X10_0 0x09 00082 #define MHV_AD_CHANNEL_0_X200_0 0x0a 00083 #define MHV_AD_CHANNEL_1_X200_0 0x0b 00084 #define MHV_AD_CHANNEL_2_X10_2 0x0c 00085 #define MHV_AD_CHANNEL_3_X10_2 0x0d 00086 #define MHV_AD_CHANNEL_2_X200_2 0x0e 00087 #define MHV_AD_CHANNEL_3_X200_2 0x0f 00088 #define MHV_AD_CHANNEL_0_X1_1 0x10 00089 #define MHV_AD_CHANNEL_1_X1_1 0x11 00090 #define MHV_AD_CHANNEL_2_X1_1 0x12 00091 #define MHV_AD_CHANNEL_3_X1_1 0x13 00092 #define MHV_AD_CHANNEL_4_X1_1 0x14 00093 #define MHV_AD_CHANNEL_5_X1_1 0x15 00094 #define MHV_AD_CHANNEL_6_X1_1 0x16 00095 #define MHV_AD_CHANNEL_7_X1_1 0x17 00096 #define MHV_AD_CHANNEL_0_X1_2 0x18 00097 #define MHV_AD_CHANNEL_1_X1_2 0x19 00098 #define MHV_AD_CHANNEL_2_X1_2 0x1a 00099 #define MHV_AD_CHANNEL_3_X1_2 0x1b 00100 #define MHV_AD_CHANNEL_4_X1_2 0x1c 00101 #define MHV_AD_CHANNEL_5_X1_2 0x1d 00102 #define MHV_AD_CHANNEL_1V1 0x1e 00103 #define MHV_AD_CHANNEL_0V 0x1f 00104 #define MHV_AD_CHANNEL_8 0x20 00105 #define MHV_AD_CHANNEL_9 0x21 00106 #define MHV_AD_CHANNEL_10 0x22 00107 #define MHV_AD_CHANNEL_11 0x23 00108 #define MHV_AD_CHANNEL_12 0x24 00109 #define MHV_AD_CHANNEL_13 0x25 00110 #define MHV_AD_CHANNEL_14 0x26 00111 #define MHV_AD_CHANNEL_15 0x27 00112 #define MHV_AD_CHANNEL_8_X10_8 0x28 00113 #define MHV_AD_CHANNEL_9_X10_8 0x29 00114 #define MHV_AD_CHANNEL_8_X200_8 0x2a 00115 #define MHV_AD_CHANNEL_9_X200_8 0x2b 00116 #define MHV_AD_CHANNEL_10_X10_10 0x2c 00117 #define MHV_AD_CHANNEL_11_X10_10 0x2d 00118 #define MHV_AD_CHANNEL_10_X200_10 0x2e 00119 #define MHV_AD_CHANNEL_11_X200_10 0x2f 00120 #define MHV_AD_CHANNEL_8_X1_9 0x30 00121 #define MHV_AD_CHANNEL_9_X1_9 0x31 00122 #define MHV_AD_CHANNEL_10_X1_9 0x32 00123 #define MHV_AD_CHANNEL_11_X1_9 0x33 00124 #define MHV_AD_CHANNEL_12_X1_9 0x34 00125 #define MHV_AD_CHANNEL_13_X1_9 0x35 00126 #define MHV_AD_CHANNEL_14_X1_9 0x36 00127 #define MHV_AD_CHANNEL_15_X1_9 0x37 00128 #define MHV_AD_CHANNEL_8_X1_10 0x38 00129 #define MHV_AD_CHANNEL_9_X1_10 0x39 00130 #define MHV_AD_CHANNEL_10_X1_10 0x3a 00131 #define MHV_AD_CHANNEL_11_X1_10 0x3b 00132 #define MHV_AD_CHANNEL_12_X1_10 0x3c 00133 #define MHV_AD_CHANNEL_13_X1_10 0x3d 00134 00135 // Power reduction register for ADC 00136 #define MHV_AD_PRR PRR0 00137 00138 00139 // Dir, Output, Input, Bit,PCINT 00140 #define MHV_PIN_A0 &DDRA, &PORTA, &PINA, 0, -1 00141 #define MHV_PIN_A1 &DDRA, &PORTA, &PINA, 1, -1 00142 #define MHV_PIN_A2 &DDRA, &PORTA, &PINA, 2, -1 00143 #define MHV_PIN_A3 &DDRA, &PORTA, &PINA, 3, -1 00144 #define MHV_PIN_A4 &DDRA, &PORTA, &PINA, 4, -1 00145 #define MHV_PIN_A5 &DDRA, &PORTA, &PINA, 5, -1 00146 #define MHV_PIN_A6 &DDRA, &PORTA, &PINA, 6, -1 00147 #define MHV_PIN_A7 &DDRA, &PORTA, &PINA, 7, -1 00148 #define MHV_PIN_B0 &DDRB, &PORTB, &PINB, 0, 0 00149 #define MHV_PIN_B1 &DDRB, &PORTB, &PINB, 1, 1 00150 #define MHV_PIN_B2 &DDRB, &PORTB, &PINB, 2, 2 00151 #define MHV_PIN_B3 &DDRB, &PORTB, &PINB, 3, 3 00152 #define MHV_PIN_B4 &DDRB, &PORTB, &PINB, 4, 4 00153 #define MHV_PIN_B5 &DDRB, &PORTB, &PINB, 5, 5 00154 #define MHV_PIN_B6 &DDRB, &PORTB, &PINB, 6, 6 00155 #define MHV_PIN_B7 &DDRB, &PORTB, &PINB, 7, 7 00156 #define MHV_PIN_C0 &DDRC, &PORTC, &PINC, 0, -1 00157 #define MHV_PIN_C1 &DDRC, &PORTC, &PINC, 1, -1 00158 #define MHV_PIN_C2 &DDRC, &PORTC, &PINC, 2, -1 00159 #define MHV_PIN_C3 &DDRC, &PORTC, &PINC, 3, -1 00160 #define MHV_PIN_C4 &DDRC, &PORTC, &PINC, 4, -1 00161 #define MHV_PIN_C5 &DDRC, &PORTC, &PINC, 5, -1 00162 #define MHV_PIN_C6 &DDRC, &PORTC, &PINC, 6, -1 00163 #define MHV_PIN_C7 &DDRC, &PORTC, &PINC, 7, -1 00164 #define MHV_PIN_D0 &DDRD, &PORTD, &PIND, 0, -1 00165 #define MHV_PIN_D1 &DDRD, &PORTD, &PIND, 1, -1 00166 #define MHV_PIN_D2 &DDRD, &PORTD, &PIND, 2, -1 00167 #define MHV_PIN_D3 &DDRD, &PORTD, &PIND, 3, -1 00168 #define MHV_PIN_D4 &DDRD, &PORTD, &PIND, 4, -1 00169 #define MHV_PIN_D5 &DDRD, &PORTD, &PIND, 5, -1 00170 #define MHV_PIN_D6 &DDRD, &PORTD, &PIND, 6, -1 00171 #define MHV_PIN_D7 &DDRD, &PORTD, &PIND, 7, -1 00172 #define MHV_PIN_E0 &DDRE, &PORTE, &PINE, 0, 8 00173 #define MHV_PIN_E1 &DDRE, &PORTE, &PINE, 1, -1 00174 #define MHV_PIN_E2 &DDRE, &PORTE, &PINE, 2, -1 00175 #define MHV_PIN_E3 &DDRE, &PORTE, &PINE, 3, -1 00176 #define MHV_PIN_E4 &DDRE, &PORTE, &PINE, 4, -1 00177 #define MHV_PIN_E5 &DDRE, &PORTE, &PINE, 5, -1 00178 #define MHV_PIN_E6 &DDRE, &PORTE, &PINE, 6, -1 00179 #define MHV_PIN_E7 &DDRE, &PORTE, &PINE, 7, -1 00180 #define MHV_PIN_F0 &DDRF, &PORTF, &PINF, 0, -1 00181 #define MHV_PIN_F1 &DDRF, &PORTF, &PINF, 1, -1 00182 #define MHV_PIN_F2 &DDRF, &PORTF, &PINF, 2, -1 00183 #define MHV_PIN_F3 &DDRF, &PORTF, &PINF, 3, -1 00184 #define MHV_PIN_F4 &DDRF, &PORTF, &PINF, 4, -1 00185 #define MHV_PIN_F5 &DDRF, &PORTF, &PINF, 5, -1 00186 #define MHV_PIN_F6 &DDRF, &PORTF, &PINF, 6, -1 00187 #define MHV_PIN_F7 &DDRF, &PORTF, &PINF, 7, -1 00188 #define MHV_PIN_G0 &DDRG, &PORTG, &PING, 0, -1 00189 #define MHV_PIN_G1 &DDRG, &PORTG, &PING, 1, -1 00190 #define MHV_PIN_G2 &DDRG, &PORTG, &PING, 2, -1 00191 #define MHV_PIN_G3 &DDRG, &PORTG, &PING, 3, -1 00192 #define MHV_PIN_G4 &DDRG, &PORTG, &PING, 4, -1 00193 #define MHV_PIN_G5 &DDRG, &PORTG, &PING, 5, -1 00194 #define MHV_PIN_H0 &DDRH, &PORTH, &PINH, 0, -1 00195 #define MHV_PIN_H1 &DDRH, &PORTH, &PINH, 1, -1 00196 #define MHV_PIN_H2 &DDRH, &PORTH, &PINH, 2, -1 00197 #define MHV_PIN_H3 &DDRH, &PORTH, &PINH, 3, -1 00198 #define MHV_PIN_H4 &DDRH, &PORTH, &PINH, 4, -1 00199 #define MHV_PIN_H5 &DDRH, &PORTH, &PINH, 5, -1 00200 #define MHV_PIN_H6 &DDRH, &PORTH, &PINH, 6, -1 00201 #define MHV_PIN_H7 &DDRH, &PORTH, &PINH, 7, -1 00202 #define MHV_PIN_J0 &DDRJ, &PORTJ, &PINJ, 0, 9 00203 #define MHV_PIN_J1 &DDRJ, &PORTJ, &PINJ, 1, 10 00204 #define MHV_PIN_J2 &DDRJ, &PORTJ, &PINJ, 2, 11 00205 #define MHV_PIN_J3 &DDRJ, &PORTJ, &PINJ, 3, 12 00206 #define MHV_PIN_J4 &DDRJ, &PORTJ, &PINJ, 4, 13 00207 #define MHV_PIN_J5 &DDRJ, &PORTJ, &PINJ, 5, 14 00208 #define MHV_PIN_J6 &DDRJ, &PORTJ, &PINJ, 6, 15 00209 #define MHV_PIN_J7 &DDRJ, &PORTJ, &PINJ, 7, -1 00210 #define MHV_PIN_K0 &DDRK, &PORTK, &PINK, 0, 16 00211 #define MHV_PIN_K1 &DDRK, &PORTK, &PINK, 1, 17 00212 #define MHV_PIN_K2 &DDRK, &PORTK, &PINK, 2, 18 00213 #define MHV_PIN_K3 &DDRK, &PORTK, &PINK, 3, 19 00214 #define MHV_PIN_K4 &DDRK, &PORTK, &PINK, 4, 20 00215 #define MHV_PIN_K5 &DDRK, &PORTK, &PINK, 5, 21 00216 #define MHV_PIN_K6 &DDRK, &PORTK, &PINK, 6, 22 00217 #define MHV_PIN_K7 &DDRK, &PORTK, &PINK, 7, 23 00218 #define MHV_PIN_L0 &DDRL, &PORTL, &PINL, 0, -1 00219 #define MHV_PIN_L1 &DDRL, &PORTL, &PINL, 1, -1 00220 #define MHV_PIN_L2 &DDRL, &PORTL, &PINL, 2, -1 00221 #define MHV_PIN_L3 &DDRL, &PORTL, &PINL, 3, -1 00222 #define MHV_PIN_L4 &DDRL, &PORTL, &PINL, 4, -1 00223 #define MHV_PIN_L5 &DDRL, &PORTL, &PINL, 5, -1 00224 #define MHV_PIN_L6 &DDRL, &PORTL, &PINL, 6, -1 00225 #define MHV_PIN_L7 &DDRL, &PORTL, &PINL, 7, -1 00226 00227 #define MHV_PIN_TIMER_0_A MHV_PIN_B7 00228 #define MHV_PIN_TIMER_0_B MHV_PIN_G5 00229 #define MHV_PIN_TIMER_1_A MHV_PIN_B5 00230 #define MHV_PIN_TIMER_1_B MHV_PIN_B6 00231 #define MHV_PIN_TIMER_1_C MHV_PIN_B7 00232 #define MHV_PIN_TIMER_2_A MHV_PIN_B4 00233 #define MHV_PIN_TIMER_2_B MHV_PIN_H6 00234 #define MHV_PIN_TIMER_3_A MHV_PIN_E3 00235 #define MHV_PIN_TIMER_3_B MHV_PIN_E4 00236 #define MHV_PIN_TIMER_3_C MHV_PIN_E5 00237 #define MHV_PIN_TIMER_4_A MHV_PIN_H3 00238 #define MHV_PIN_TIMER_4_B MHV_PIN_H4 00239 #define MHV_PIN_TIMER_4_C MHV_PIN_H5 00240 #define MHV_PIN_TIMER_5_A MHV_PIN_L3 00241 #define MHV_PIN_TIMER_5_B MHV_PIN_L4 00242 #define MHV_PIN_TIMER_5_C MHV_PIN_L6 00243 00244 #define MHV_PC_INT_COUNT 24 00245 00246 #define MHV_EEPROM_VECT EE_READY_vect 00247 00248 #endif /* MHV_IO_ATMEGA1280_H_ */